BOOM
RISC-V ecosystemBOOM is an out-of-order RISC-V core written in Chisel. It can execute instructions in a different order than the program lists them, which keeps more execution units busy. SonicBOOM, its third version, came out in 2020.
Overview
BOOM, the Berkeley Out-of-Order Machine, is a 64-bit RISC-V core written in Chisel, a hardware construction language built on Scala. A core is the part of a chip that executes instructions. An out-of-order core can execute instructions in a different order than the program lists them. When one instruction waits for data from memory, later instructions that do not depend on it go ahead, and more of the core's execution units stay busy.
BOOM implements RV64GC, the general-purpose 64-bit instruction set with compressed instructions, supports virtual memory and boots Linux. Its third version, SonicBOOM, scores 6.2 CoreMark per MHz. CoreMark is a standard benchmark program, and dividing its score by the clock frequency measures how much work the core does per clock cycle.
History
Christopher Celio started BOOM in the Berkeley Architecture Research group at UC Berkeley and described its design in a 2015 technical report. A second version followed in 2017. Jerry Zhao, Ben Korpan, Abraham Gonzalez and Krste Asanović presented SonicBOOM, the third version, in 2020.
Where it is used
BOOM is a research core. Its parameters set the pipeline width, the number of execution units and the size of internal queues, which lets researchers measure how each choice affects performance. Users build BOOM systems through Chipyard because the repository holds only the core.