slti
lyszt.net covers slti and other RISC-V instructions in more detail.
Encoding format
Description
slti compares a register against a constant and writes 1 or 0 to the destination. It is slt, which compares two registers and stores the result as a number (see that page), with the second value supplied as an immediate. An immediate is a constant encoded in the instruction, and the i in the name marks it.
The form of slti is shown below. When the value in rs1 is less than the constant imm, rd receives 1, and 0 otherwise.
slti rd, rs1, imm
The comparison is signed, so the register and the constant are both read as numbers that may be negative.
Use it to compare a variable against a fixed threshold known in advance. Checking whether an index is below 10 or whether a value has dropped under a limit takes one slti. The next line asks whether t0 is less than zero, which tests for a negative value and sets t1 to 1 for negative values and 0 otherwise.
slti t1, t0, 0
The RISC-V manual says slti places 1 in rd if rs1 is less than the sign-extended immediate when both are treated as signed numbers, and 0 otherwise. The overflow check for general signed addition uses it, as shown on the slt page, to record whether an operand is negative.
The constant ranges from -2048 to 2047. To compare with a larger value, load the constant into a register with li and use slt. The assembler rejects an out-of-range constant with an error message.
Example
li t0, 3 slti t1, t0, 5 # t1 = 1 (3 < 5)
References
- [1]RISC-V International. The RISC-V Instruction Set Manual, Volume I: Unprivileged Architecture. Version 20260120. Section 2.4.1, Integer Register-Immediate Instructions, pages 28 to 29.
- [2]RISC-V International. The RISC-V Instruction Set Manual, Volume I: Unprivileged Architecture. Version 20260120. Section 2.4, Integer Computational Instructions, page 27.
