sll

sll

RISC-V Assembly Reference

lyszt.net covers sll and other RISC-V instructions in more detail.

Encoding format

R
31–25funct7
24–20rs2
19–15rs1
14–12funct3
11–7rd
6–0opcode
I
31–20imm[11:0]
19–15rs1
14–12funct3
11–7rd
6–0opcode
S
31–25imm[11:5]
24–20rs2
19–15rs1
14–12funct3
11–7imm[4:0]
6–0opcode
B
31–25imm[12,10:5]
24–20rs2
19–15rs1
14–12funct3
11–7imm[4:1,11]
6–0opcode
U
31–12imm[31:12]
11–7rd
6–0opcode
J
31–12imm[20,10:1,11,19:12]
11–7rd
6–0opcode

Description

sll moves the bits of a number to the left. A register holds 32 bits in a row, and a shift moves the whole row left or right by some number of positions. The name stands for shift left logical. In the form below, the value in rs1 is shifted left by the number of places given in rs2, and the result goes to rd.

sll rd, rs1, rs2

As bits move left, zeros fill the empty positions on the right, and bits pushed past the left edge are dropped.

A left shift by one place doubles a number, in the same way that appending a 0 to a decimal number multiplies it by ten. A shift of 1 multiplies by 2, a shift of 2 multiplies by 4, and a shift of 3 multiplies by 8. A shift costs the processor less than a multiply, which makes it the fast route to multiplying by powers of two. Array access relies on this, because the address of each element lies a fixed power-of-two number of bytes past the previous one.

According to the RISC-V manual, the shift amount is held in the low 5 bits of register rs2. Five bits cover 0 to 31 places, so the remaining bits of rs2 have no effect. The manual calls sll a logical left shift, meaning zeros enter the low bits.

In this form the shift amount comes from a register, which fits an amount computed while the program runs. Use slli for a fixed amount. The example shifts 3 left by 2 places, multiplying it by 4 to give 12.

Example

li t0, 3
li t1, 2
sll t2, t0, t1   # t2 = 12