seqzpseudo

seqz

pseudo
RISC-V Assembly Reference

lyszt.net covers seqz and other RISC-V instructions in more detail.

Description

seqz tests whether a register holds zero. The name means "set if equal to zero." When source register rs is zero, the form below writes 1 into destination register rd, and 0 when rs holds any other value.

seqz rd, rs

The output is 1 or 0, answering whether the value is zero.

seqz is a pseudo-instruction: a readable name that the assembler rewrites into a real instruction. The result is the instruction below, which asks whether the value is below 1.

sltiu rd, rs, 1

Among unsigned numbers, 0 is the only value below 1. You write seqz, and the assembler performs the translation.

No RISC-V instruction asks whether two values are equal, so seqz is used to build equality tests. XOR the two values, which yields zero when they match and a non-zero result when they differ, then apply seqz to that result. A 1 means the originals were equal. The xor page explains why XOR detects sameness.

The RISC-V manual defines seqz as an assembler pseudoinstruction for sltiu with the constant 1, which sets rd to 1 if rs1 equals zero and to 0 otherwise.

seqz also reverses the sense of a true or false value. A register holding 0 becomes 1, and any non-zero value becomes 0. The answer is an ordinary number, so it can feed into further arithmetic, for instance multiplying by it to zero out a value on a condition. Its counterpart is snez, which tests for non-zero.

Expands to

sltiu rd, rs, 1

The assembler replaces this pseudo-instruction with the real instruction or instructions listed above.

Example

li t0, 0
seqz t1, t0       # t1 = 1