ori

ori performs a bitwise OR with a constant. Its relationship to or matches that of andi to and. The i means immediate, a fixed value encoded in the instruction. ori ORs a register with that constant rather than ORing two registers. The OR rule does not change. A bit position in the result is 1 when either bit there is 1, so the constant sets the bits you choose. The or page covers the operation.

The form of ori appears below. It ORs the value in rs1 with the constant imm and writes the result to rd.

ori rd, rs1, imm

OR sets bits and leaves the rest as they were, so ori switches on specific flags when you know which ones you want. The next line turns on the third bit from the right in t0 and leaves all other bits unchanged. The 0b prefix marks a binary constant.

ori t0, t0, 0b100

Configuration registers, permission flags and status words hold independent on and off bits, and ori switches chosen ones on in a single instruction with no mask register.

The RISC-V manual states that the 12-bit immediate is sign-extended to 32 bits before the operation. A negative constant therefore has all of its upper bits set, and ori with -1 sets all bits of the result.

The constant is limited to 12 bits, as with andi and addi. To set bits outside that range, load the wider mask into a register with li and use or.