rd, rs1, rs2rd = rs1 / rs2divu is division again, but unsigned — and that word is the whole point of this instruction, so it is worth pinning down. The same 32 bits in a register can be read two ways. Read as signed, the top bit means negative, so the pattern can stand for numbers from about -2 billion to +2 billion. Read as unsigned, there are no negatives at all, and those same bits count plainly from 0 up to about 4 billion. The bits never change; only the interpretation does.
div reads its inputs as signed; divu reads them as unsigned. This matters enormously near the top of the range. A register whose bits are all 1s is -1 to div but 4,294,967,295 to divu, so the two instructions can give completely different answers for identical inputs.
Use divu whenever the numbers genuinely cannot be negative: array positions, sizes in bytes, loop counts, pixel coordinates. Reaching for the signed div on such values invites a subtle bug — the moment a quantity grows past about 2 billion, its top bit turns on and the signed reading flips it to a negative number, wrecking the division.
Like its signed sibling, divu never crashes. Dividing by zero returns the largest possible unsigned value (all bits set) rather than halting. And when the divisor is a power of two, a logical right shift (srli) divides faster — shifting right by 3 divides an unsigned number by 8 exactly.